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1. general description the 74AVCH1T45 is a single bit, dual supply transceiver that enables bidirectional level translation. it features two data input-output ports (a and b), a direction control input (dir) and dual supply pins (v cc(a) and v cc(b) ). both v cc(a) and v cc(b) can be supplied at any voltage between 0.8 v and 3.6 v making the device suitable for translating between any of the low voltage nodes (0.8 v, 1.2 v, 1.5 v, 1.8 v, 2.5 v and 3.3 v). pins a and dir are referenced to v cc(a) and pin b is referenced to v cc(b) . a high on dir allows transmission from a to b and a low on dir allows transmission from b to a. the device is fully speci?ed for partial power-down applications using i off . the i off circuitry disables the output, preventing any damaging back?ow current through the device when it is powered down. in suspend mode when either v cc(a) or v cc(b) are at gnd level, both a and b are in the high-impedance off-state. the 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or ?oating data inputs at a valid logic level. this feature eliminates the need for external pull-up or pull-down resistors. 2. features n wide supply voltage range: u v cc(a) : 0.8 v to 3.6 v u v cc(b) : 0.8 v to 3.6 v n high noise immunity n complies with jedec standards: u jesd8-12 (0.8 v to 1.3 v) u jesd8-11 (0.9 v to 1.65 v) u jesd8-7 (1.2 v to 1.95 v) u jesd8-5 (1.8 v to 2.7 v) u jesd8-b (2.7 v to 3.6 v) n esd protection: u hbm jesd22-a114e class 3b exceeds 8000 v u mm jesd22-a115-a exceeds 200 v u cdm jesd22-c101c exceeds 1000 v n maximum data rates: u 500 mbit/s (1.8 v to 3.3 v translation) u 320 mbit/s (< 1.8 v to 3.3 v translation) u 320 mbit/s (translate to 2.5 v or 1.8 v) u 280 mbit/s (translate to 1.5 v) 74AVCH1T45 dual supply translating transceiver; 3-state rev. 01 25 october 2007 product data sheet
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 2 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state u 240 mbit/s (translate to 1.2 v) n suspend mode n bus hold on data inputs n latch-up performance exceeds 100 ma per jesd 78 class ii n inputs accept voltages up to 3.6 v n low noise overshoot and undershoot < 10 % of v cc n i off circuitry provides partial power-down mode operation n multiple package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c 3. ordering information 4. marking 5. functional diagram table 1. ordering information type number package temperature range name description version 74AVCH1T45gw - 40 c to +125 c sc-88 plastic surface-mounted package; 6 leads sot363 74AVCH1T45gm - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm sot886 table 2. marking type number marking code 74AVCH1T45gw k5 74AVCH1T45gm k5 fig 1. logic symbol fig 2. logic diagram 001aag885 v cc(b) v cc(a) 5 dir 3 a b 4 001aag886 v cc(b) v cc(a) dir a b
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 3 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level; x = dont care; z = high-impedance off-state. [2] the dir input circuit is referenced to v cc(a) . [3] the input circuit of the data i/o is always active. [4] if at least one of v cc(a) or v cc(b) is at gnd level, the device goes into suspend mode. fig 3. pin con?guration sot363 fig 4. pin con?guration sot886 74AVCH1T45 v cc(a) v cc(b) gnd ab 001aag887 1 2 3 6 dir 5 4 74AVCH1T45 gnd 001aag888 v cc(a) a dir v cc(b) b transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description v cc(a) 1 supply voltage port a and dir gnd 2 ground (0 v) a 3 data input or output b 4 data input or output dir 5 direction control v cc(b) 6 supply voltage port b table 4. function table [1] supply voltage input input/output [3] v cc(a) , v cc(b) dir [2] a b 0.8 v to 3.6 v l a = b input 0.8 v to 3.6 v h input b = a gnd [4] xzz
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 4 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 8. limiting values [1] the minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are obs erved. [2] v cco is the supply voltage associated with the output port. [3] v cco + 0.5 v should not exceed 4.6 v. [4] for sc-88 packages: above 87.5 c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 45 c the value of p tot derates linearly with 2.4 mw/k. 9. recommended operating conditions [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the input port. table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc(a) supply voltage port a - 0.5 +4.6 v v cc(b) supply voltage port b - 0.5 +4.6 v i ik input clamping current v i <0v - 50 - ma v i input voltage [1] - 0.5 +4.6 v i ok output clamping current v o <0v - 50 - ma v o output voltage active mode [1] [2] [3] - 0.5 v cco + 0.5 v suspend or 3-state mode [1] - 0.5 +4.6 v i o output current v o =0vtov cc - 50 ma i cc supply current i cc(a) or i cc(b) - 100 ma i gnd ground current - 100 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [4] - 250 mw table 6. recommended operating conditions symbol parameter conditions min max unit v cc(a) supply voltage port a 0.8 3.6 v v cc(b) supply voltage port b 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode [1] 0v cco v suspend or 3-state mode 0 3.6 v t amb ambient temperature - 40 +125 c d t/ d v input transition rise and fall rate v cci = 0.8 v to 3.6 v [2] - 5 ns/v
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 5 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 10. static characteristics table 7. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb = 25 c v oh high-level output voltage v i = v ih or v il i o = - 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.69 - v v ol low-level output voltage v i = v ih or v il i o = 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.07 - v i i input leakage current dir input; v i = 0 v to 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - 0.025 0.25 m a i bhl bus hold low current a or b port; v i = 0.42 v; v cc(a) =v cc(b) = 1.2 v -26- m a i bhh bus hold high current a or b port; v i = 0.78 v; v cc(a) =v cc(b) = 1.2 v - - 24 - m a i bhlo bus hold low overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [1] -28- m a i bhho bus hold high overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [1] - - 26 - m a i oz off-state output current a or b port; v o = 0 v or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] - 0.5 2.5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v - 0.1 1 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v - 0.1 1 m a c i input capacitance dir input; v i = 0 v or 3.3 v; v cc(a) =v cc(b) = 3.3 v -1-pf c i/o input/output capacitance a and b port; suspend mode; v o = 3.3 v or 0 v; v cc(a) =v cc(b) = 3.3 v -4-pf t amb = - 40 c to +85 c v ih high-level input voltage data input [3] v cci = 0.8 v 0.70 v cci -- v v cci = 1.1 v to 1.95 v 0.65 v cci -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2 - - v dir input v cci = 0.8 v 0.70 v cc(a) -- v v cci = 1.1 v to 1.95 v 0.65 v cc(a) -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2 - - v
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 6 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state v il low-level input voltage data input [3] v cci = 0.8 v - - 0.30 v cci v v cci = 1.1 v to 1.95 v - - 0.35 v cci v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v dir input v cci = 0.8 v - - 0.30 v cc(a) v v cci = 1.1 v to 1.95 v - - 0.35 v cc(a) v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] v cco - 0.1 - - v i o = - 3 ma; v cc(a) = v cc(b) = 1.1 v 0.85 - - v i o = - 6 ma; v cc(a) = v cc(b) = 1.4 v 1.05 - - v i o = - 8 ma; v cc(a) = v cc(b) = 1.65 v 1.2 - - v i o = - 9 ma; v cc(a) = v cc(b) = 2.3 v 1.75 - - v i o = - 12 ma; v cc(a) = v cc(b) = 3.0 v 2.3 - - v v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v - - 0.1 v i o = 3 ma; v cc(a) = v cc(b) = 1.1 v - - 0.25 v i o = 6 ma; v cc(a) = v cc(b) = 1.4 v - - 0.35 v i o = 8 ma; v cc(a) = v cc(b) = 1.65 v - - 0.45 v i o = 9 ma; v cc(a) = v cc(b) = 2.3 v - - 0.55 v i o = 12 ma; v cc(a) = v cc(b) = 3.0 v - - 0.7 v i i input leakage current dir input; v i = 0 v to 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v -- 1 m a i bhl bus hold low current a or b port v i = 0.49 v; v cc(a) = v cc(b) = 1.4 v 15 - - m a v i = 0.58 v; v cc(a) = v cc(b) = 1.65 v 25 - - m a v i = 0.70 v; v cc(a) = v cc(b) = 2.3 v 45 - - m a v i = 0.80 v; v cc(a) = v cc(b) = 3.0 v 100 - - m a i bhh bus hold high current a or b port v i = 0.91 v; v cc(a) = v cc(b) = 1.4 v - 15 - - m a v i = 1.07 v; v cc(a) = v cc(b) = 1.65 v - 25 - - m a v i = 1.60 v; v cc(a) = v cc(b) = 2.3 v - 45 - - m a v i = 2.00 v; v cc(a) = v cc(b) = 3.0 v - 100 - - m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 7 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state i bhlo bus hold low overdrive current a or b port [1] v cc(a) = v cc(b) = 1.6 v 125 - - m a v cc(a) = v cc(b) = 1.95 v 200 - - m a v cc(a) = v cc(b) = 2.7 v 300 - - m a v cc(a) = v cc(b) = 3.6 v 500 - - m a i bhho bus hold high overdrive current a or b port [1] v cc(a) = v cc(b) = 1.6 v - 125 - - m a v cc(a) = v cc(b) = 1.95 v - 200 - - m a v cc(a) = v cc(b) = 2.7 v - 300 - - m a v cc(a) = v cc(b) = 3.6 v - 500 - - m a i oz off-state output current a or b port; v o = 0 v or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] -- 5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v -- 5 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 5 m a i cc supply current a port; v i = 0 v or v cci ; i o = 0 a [3] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 8 m a v cc(a) = 3.6 v; v cc(b) = 0 v - - 8 m a v cc(a) = 0 v; v cc(b) = 3.6 v - 20- m a b port; v i = 0 v or v cci ; i o = 0 a v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 8 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 20- m a v cc(a) = 0 v; v cc(b) = 3.6 v - - 8 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = 0 v or v cci ; v cc(a) =v cc(b) = 0.8 v to 3.6 v --16 m a t amb = - 40 c to +125 c v ih high-level input voltage data input [3] v cci = 0.8 v 0.70 v cci -- v v cci = 1.1 v to 1.95 v 0.65 v cci -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2 - - v dir input v cci = 0.8 v 0.70 v cc(a) -- v v cci = 1.1 v to 1.95 v 0.65 v cc(a) -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2 - - v table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 8 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state v il low-level input voltage data input [3] v cci = 0.8 v - - 0.30 v cci v v cci = 1.1 v to 1.95 v - - 0.35 v cci v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v dir input v cci = 0.8 v - - 0.30 v cc(a) v v cci = 1.1 v to 1.95 v - - 0.35 v cc(a) v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] v cco - 0.1 - - v i o = - 3 ma; v cc(a) = v cc(b) = 1.1 v 0.85 - - v i o = - 6 ma; v cc(a) = v cc(b) = 1.4 v 1.05 - - v i o = - 8 ma; v cc(a) = v cc(b) = 1.65 v 1.2 - - v i o = - 9 ma; v cc(a) = v cc(b) = 2.3 v 1.75 - - v i o = - 12 ma; v cc(a) = v cc(b) = 3.0 v 2.3 - - v v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v - - 0.1 v i o = 3 ma; v cc(a) = v cc(b) = 1.1 v - - 0.25 v i o = 6 ma; v cc(a) = v cc(b) = 1.4 v - - 0.35 v i o = 8 ma; v cc(a) = v cc(b) = 1.65 v - - 0.45 v i o = 9 ma; v cc(a) = v cc(b) = 2.3 v - - 0.55 v i o = 12 ma; v cc(a) = v cc(b) = 3.0 v - - 0.7 v i i input leakage current dir input; v i = 0 v to 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v -- 1.5 m a i bhl bus hold low current a or b port v i = 0.49 v; v cc(a) = v cc(b) = 1.4 v 15 - - m a v i = 0.58 v; v cc(a) = v cc(b) = 1.65 v 25 - - m a v i = 0.70 v; v cc(a) = v cc(b) = 2.3 v 45 - - m a v i = 0.80 v; v cc(a) = v cc(b) = 3.0 v 90 - - m a i bhh bus hold high current a or b port v i = 0.91 v; v cc(a) = v cc(b) = 1.4 v - 15 - - m a v i = 1.07 v; v cc(a) = v cc(b) = 1.65 v - 25 - - m a v i = 1.60 v; v cc(a) = v cc(b) = 2.3 v - 45 - - m a v i = 2.00 v; v cc(a) = v cc(b) = 3.0 v - 100 - - m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 9 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state [1] in order to guarantee the node switches, an external driver must source/sink at least i bhlo / i bhho when the input is in the range v il to v ih . [2] v cco is the supply voltage associated with the output port. [3] v cci is the supply voltage associated with the data input port. i bhlo bus hold low overdrive current a or b port [1] v cc(a) = v cc(b) = 1.6 v 125 - - m a v cc(a) = v cc(b) = 1.95 v 200 - - m a v cc(a) = v cc(b) = 2.7 v 300 - - m a v cc(a) = v cc(b) = 3.6 v 500 - - m a i bhho bus hold high overdrive current a or b port [1] v cc(a) = v cc(b) = 1.6 v - 125 - - m a v cc(a) = v cc(b) = 1.95 v - 200 - - m a v cc(a) = v cc(b) = 2.7 v - 300 - - m a v cc(a) = v cc(b) = 3.6 v - 500 - - m a i oz off-state output current a or b port; v o = 0 v or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] -- 7.5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 35 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 35 m a i cc supply current a port; v i = 0 v or v cci ; i o = 0 a [3] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 12 m a v cc(a) = 3.6 v; v cc(b) = 0 v - - 12 m a v cc(a) = 0 v; v cc(b) = 3.6 v - 80- m a b port; v i = 0 v or v cci ; i o = 0 a v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 12 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 80- m a v cc(a) = 0 v; v cc(b) = 3.6 v - - 12 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = 0 v or v cci ; v cc(a) =v cc(b) = 0.8 v to 3.6 v --24 m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 10 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 11. dynamic characteristics [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . t en is a calculated value using the formula shown in section 13.4 enab le times [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . t en is a calculated value using the formula shown in section 13.4 enab le times [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [2] f i = 10 mhz; v i = gnd to v cc ; t r = t f = 1 ns; c l = 0 pf; r l = w . table 8. typical dynamic characteristics at v cc(a) = 0.8 v and t amb = 25 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay a to b 15.8 8.4 8.0 8.0 8.7 9.5 ns b to a 15.8 12.7 12.4 12.2 12.0 11.8 ns t dis disable time dir to a 12.2 12.2 12.2 12.2 12.2 12.2 ns dir to b 11.7 7.9 7.6 8.2 8.7 10.2 ns t en enable time dir to a 27.5 20.6 20.0 20.4 20.7 22.0 ns dir to b 28.0 20.6 20.2 20.2 20.9 21.7 ns table 9. typical dynamic characteristics at v cc(b) = 0.8 v and t amb = 25 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(a) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay a to b 15.8 12.7 12.4 12.2 12.0 11.8 ns b to a 15.8 8.4 8.0 8.0 8.7 9.5 ns t dis disable time dir to a 12.2 4.9 3.8 3.7 2.8 3.4 ns dir to b 11.7 9.2 9.0 8.8 8.7 8.6 ns t en enable time dir to a 27.5 17.6 17.0 16.8 17.4 18.1 ns dir to b 28.0 17.6 16.2 15.9 14.8 15.2 ns table 10. typical power dissipation capacitance at v cc(a) = v cc(b) and t amb = 25 c [1] [2] voltages are referenced to gnd (groun d=0v). symbol parameter conditions v cc(a) and v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v c pd power dissipation capacitance a port: (direction a to b); b port: (direction b to a) 122222pf a port: (direction b to a); b port: (direction a to b) 9 1111121417pf
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 11 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . t en is a calculated value using the formula shown in section 13.4 enab le times table 11. dynamic characteristics for temperature range - 40 c to +85 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 . symbol parameter conditions v cc(b) unit 1.2 v 0.1 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay a to b 1.0 9.0 0.7 6.8 0.6 6.1 0.5 5.7 0.5 6.1 ns b to a 1.0 9.0 0.8 8.0 0.7 7.7 0.6 7.2 0.5 7.1 ns t dis disable time dir to a 2.2 8.8 2.2 8.8 2.2 8.8 2.2 8.8 2.2 8.8 ns dir to b 2.2 8.4 1.8 6.7 2.0 6.9 1.7 6.2 2.4 7.2 ns t en enable time dir to a - 17.4 - 14.7 - 14.6 - 13.4 - 14.3 ns dir to b - 17.8 - 15.6 - 14.9 - 14.5 - 14.9 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay a to b 1.0 8.0 0.7 5.4 0.6 4.6 0.5 3.7 0.5 3.5 ns b to a 1.0 6.8 0.8 5.4 0.7 5.1 0.6 4.7 0.5 4.5 ns t dis disable time dir to a 1.6 6.3 1.6 6.3 1.6 6.3 1.6 6.3 1.6 6.3 ns dir to b 2.0 7.6 1.8 5.9 1.6 6.0 1.2 4.8 1.7 5.5 ns t en enable time dir to a - 14.4 - 11.3 - 11.1 - 9.5 - 10.0 ns dir to b - 14.3 - 11.7 - 10.9 - 10.0 - 9.8 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay a to b 1.0 7.7 0.6 5.1 0.5 4.3 0.5 3.4 0.5 3.1 ns b to a 1.0 6.1 0.7 4.6 0.5 4.4 0.5 3.9 0.5 3.7 ns t dis disable time dir to a 1.6 5.5 1.6 5.5 1.6 5.5 1.6 5.5 1.6 5.5 ns dir to b 1.8 7.8 1.8 5.7 1.4 5.8 1.0 4.5 1.5 5.2 ns t en enable time dir to a - 13.9 - 10.3 - 10.2 - 8.4 - 8.9 ns dir to b - 13.2 - 10.6 - 9.8 - 8.9 - 8.6 ns v cc(a) = 2.3 v to 2.7 v t pd propagation delay a to b 1.0 7.2 0.5 4.7 0.5 3.9 0.5 3.0 0.5 2.6 ns b to a 1.0 5.7 0.6 3.8 0.5 3.4 0.5 3.0 0.5 2.8 ns t dis disable time dir to a 1.5 4.2 1.5 4.2 1.5 4.2 1.5 4.2 1.5 4.2 ns dir to b 1.7 7.3 2.0 5.2 1.5 5.1 0.6 4.2 1.1 4.8 ns t en enable time dir to a - 13.0 - 9.0 - 8.5 - 7.2 - 7.6 ns dir to b - 11.4 - 8.9 - 8.1 - 7.2 - 6.8 ns v cc(a) = 3.0 v to 3.6 v t pd propagation delay a to b 1.0 7.1 0.5 4.5 0.5 3.7 0.5 2.8 0.5 2.4 ns b to a 1.0 6.1 0.6 3.6 0.5 3.1 0.5 2.6 0.5 2.4 ns t dis disable time dir to a 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 ns dir to b 1.7 7.2 0.7 5.5 0.6 5.5 0.7 4.1 1.7 4.7 ns t en enable time dir to a - 13.3 - 9.1 - 8.6 - 6.7 - 7.1 ns dir to b - 11.8 - 9.2 - 8.4 - 7.5 - 7.1 ns
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 12 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . t en is a calculated value using the formula shown in section 13.4 enab le times table 12. dynamic characteristics for temperature range - 40 c to +125 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(b) unit 1.2 v 0.1 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay a to b 1.0 9.9 0.7 7.5 0.6 6.8 0.5 6.3 0.5 6.8 ns b to a 1.0 9.9 0.8 8.8 0.7 8.5 0.6 8.0 0.5 7.9 ns t dis disable time dir to a 2.2 9.7 2.2 9.7 2.2 9.7 2.2 9.7 2.2 9.7 ns dir to b 2.2 9.2 1.8 7.4 2.0 7.6 1.7 6.9 2.4 8.0 ns t en enable time dir to a - 19.1 - 16.2 - 16.1 - 14.9 - 15.9 ns dir to b - 19.6 - 17.2 - 16.5 - 16.0 - 16.5 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay a to b 1.0 8.8 0.7 6.0 0.6 5.1 0.5 4.1 0.5 3.9 ns b to a 1.0 7.5 0.8 6.0 0.7 5.7 0.6 5.2 0.5 5.0 ns t dis disable time dir to a 1.6 7.0 1.6 7.0 1.6 7.0 1.6 7.0 1.6 7.0 ns dir to b 2.0 8.3 1.8 6.5 1.6 6.6 1.2 5.3 1.7 6.1 ns t en enable time dir to a - 15.8 - 12.5 - 12.3 - 10.5 - 11.1 ns dir to b - 15.8 - 13.0 - 12.7 - 11.1 - 10.9 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay a to b 1.0 8.5 0.6 5.7 0.5 4.8 0.5 3.8 0.5 3.5 ns b to a 1.0 6.8 0.7 5.1 0.5 4.9 0.5 4.3 0.5 4.1 ns t dis disable time dir to a 1.6 6.1 1.6 6.1 1.6 6.1 1.6 6.1 1.6 6.1 ns dir to b 1.8 8.6 1.8 6.3 1.4 6.4 1.0 5.0 1.5 5.8 ns t en enable time dir to a - 15.4 - 11.4 - 11.3 - 9.3 - 9.9 ns dir to b - 14.6 - 11.8 - 10.9 - 9.9 - 9.6 ns v cc(a) = 2.3 v to 2.7 v t pd propagation delay a to b 1.0 8.0 0.5 5.2 0.5 4.3 0.5 3.3 0.5 2.9 ns b to a 1.0 6.3 0.6 4.2 0.5 3.8 0.5 3.3 0.5 3.1 ns t dis disable time dir to a 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 ns dir to b 1.7 8.0 2.0 5.8 1.5 5.7 0.6 4.7 1.1 5.3 ns t en enable time dir to a - 14.3 - 10.0 - 9.5 - 8.0 - 8.4 ns dir to b - 12.7 - 9.9 - 9.0 - 8.0 - 7.6 ns v cc(a) = 3.0 v to 3.6 v t pd propagation delay a to b 1.0 7.9 0.5 5.0 0.5 4.1 0.5 3.1 0.5 2.7 ns b to a 1.0 6.8 0.6 4.0 0.5 3.5 0.5 2.9 0.5 2.7 ns t dis disable time dir to a 1.5 5.2 1.5 5.2 1.5 5.2 1.5 5.2 1.5 5.2 ns dir to b 1.7 7.9 0.7 6.0 0.6 6.1 0.7 4.6 1.7 5.2 ns t en enable time dir to a - 14.7 - 10.1 - 9.6 - 7.5 - 7.9 ns dir to b - 13.1 - 10.2 - 9.3 - 8.3 - 7.9 ns
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 13 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 12. waveforms [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. measurement points are given in t ab le 13 . v ol and v oh are typical output voltage drops that occur with the output load. fig 5. the data input (a, b) to output (b, a) propagation delay times 001aae967 a, b input b, a output t plh t phl gnd v i v oh v m v m v ol measurement points are given in t ab le 13 . v ol and v oh are typical output voltage drops that occur with the output load. fig 6. enable and disable times 001aae968 t pzl t pzh t phz t plz gnd gnd v i v cco v ol v oh v m v m v m v x v y outputs disabled outputs enabled outputs enabled output low-to-off off-to-low output high-to-off off-to-high dir input table 13. measurement points supply voltage input [1] output [2] v cc(a) , v cc(b) v m v m v x v y 1.1 v to 1.6 v 0.5 v cci 0.5 v cco v ol + 0.1 v v oh - 0.1 v 1.65 v to 2.7 v 0.5 v cci 0.5 v cco v ol + 0.15 v v oh - 0.15 v 3.0 v to 3.6 v 0.5 v cci 0.5 v cco v ol + 0.3 v v oh - 0.3 v
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 14 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. test data is given in t ab le 14 . r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance. v ext = external voltage for measuring switching times. fig 7. load circuitry for switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 14. test data supply voltage input load v ext v cc(a) , v cc(b) v i [1] d t/ d v c l r l t plh , t phl t pzh , t phz t pzl , t plz [2] 1.1 v to 1.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco 1.65 v to 2.7 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco 3.0 v to 3.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 15 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 13. application information 13.1 unidirectional logic level-shifting application the circuit given in figure 8 is an example of the 74AVCH1T45 being used in an unidirectional logic level-shifting application. fig 8. unidirectional logic level-shifting application table 15. description unidirectional logic level-shifting application pin name function description 1v cc(a) v cc1 supply voltage of system-1 (0.8 v to 3.6 v) 2 gnd gnd device gnd 3 a out output level depends on v cc1 voltage 4 dir dir the gnd (low level) determines b port to a port direction 5 b in input threshold value depends on v cc2 voltage 6v cc(b) v cc2 supply voltage of system-2 (0.8 v to 3.6 v) 001aag889 system-1 system-2 74AVCH1T45 v cc(a) v cc(b) gnd vcc1 vcc1 ab 1 2 3 6 dir 5 4 vcc2 vcc2
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 16 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 13.2 bidirectional logic level-shifting application figure 9 shows the 74AVCH1T45 being used in a bidirectional logic level-shifting application. since the device does not have an output enable pin, the system designer should take precautions to avoid bus contention between system-1 and system-2 when changing directions. t ab le 16 gives a sequence that will illustrate data transmission from system-1 to system-2 and then from system-2 to system-1. [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. fig 9. bidirectional logic level-shifting application table 16. description bidirectional logic level-shifting application [1] state dir ctrl i/o-1 i/o-2 description 1 h output input system-1 data to system-2 2 h z z system-2 is getting ready to send data to system-1. i/o-1 and i/o-2 are disabled. the bus-line state depends on bus hold. 3 l z z dir bit is set low. i/o-1 and i/o-2 still are disabled. the bus-line state depends on bus hold. 4 l input output system-2 data to system-1 001aag890 i/o-1 i/o-2 dir ctrl system-1 system-2 74AVCH1T45 v cc(a) v cc(b) gnd vcc1 vcc1 ab 1 2 3 6 dir 5 4 vcc2 vcc2
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 17 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 13.3 power-up considerations the device is designed such that no special power-up sequence is required other than gnd being applied ?rst. 13.4 enable times calculate the enable times for the 74AVCH1T45 using the following formulas: ? t en (dir to a) = t dis (dir to b) + t pd (b to a) ? t en (dir to b) = t dis (dir to a) + t pd (a to b) in a bidirectional application, these enable times provide the maximum delay from the time the dir bit is switched until an output is expected. for example, if the 74AVCH1T45 initially is transmitting from a to b, then the dir bit is switched, the b port of the device must be disabled before presenting it with an input. after the b port has been disabled, an input signal applied to it appears on the corresponding a port after the speci?ed propagation delay. table 17. typical total supply current (i cc(a) + i cc(b) ) v cc(a) v cc(b) unit 0 v 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v 0 v 0 0.1 0.1 0.1 0.1 0.1 0.1 m a 0.8 v 0.1 0.1 0.1 0.1 0.1 0.7 2.3 m a 1.2 v 0.1 0.1 0.1 0.1 0.1 0.3 1.4 m a 1.5 v 0.1 0.1 0.1 0.1 0.1 0.1 0.9 m a 1.8 v 0.1 0.1 0.1 0.1 0.1 0.1 0.5 m a 2.5 v 0.1 0.7 0.3 0.1 0.1 0.1 0.1 m a 3.3 v 0.1 2.3 1.4 0.9 0.5 0.1 0.1 m a
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 18 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 14. package outline fig 10. package outline sot363 (sc-88) references outline version european projection issue date iec jedec jeita sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 6 plastic surface-mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 04-11-08 06-03-16
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 19 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state fig 11. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 20 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 15. abbreviations 16. revision history table 18. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 19. revision history document id release date data sheet status change notice supersedes 74AVCH1T45_1 20071025 product data sheet - -
74AVCH1T45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 25 october 2007 21 of 22 nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 17.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 17.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 18. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74AVCH1T45 dual supply translating transceiver; 3-state ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 25 october 2007 document identifier: 74AVCH1T45_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 11 dynamic characteristics . . . . . . . . . . . . . . . . . 10 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 application information. . . . . . . . . . . . . . . . . . 15 13.1 unidirectional logic level-shifting application. . 15 13.2 bidirectional logic level-shifting application. . . 16 13.3 power-up considerations . . . . . . . . . . . . . . . . 17 13.4 enable times . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 17.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 17.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 18 contact information. . . . . . . . . . . . . . . . . . . . . 21 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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